Modern microcontrollers come with plenty of internal FLASH memory which is called program memory. On the other side, much high-performance MCUs as the NXP, ESP8266, ESP32 are without flash memory, so they can use external serial SPI or Quad-SPI (QSPI) memory instead. Like the Serial Nor Flash Externally Expanding Memory Chip W25Q64 to add flash memory to your microcontrollers or if your microcontroller has a very small flash memory you can use this module with it.
The typical usage of external SPI flash memory is using it to load or store the main Program. With the addition of a small external device on the SPI bus, you can easily add several KBytes of memory to the microcontroller. Such SPI memory devices are very inexpensive:
The main parameters:
it Supports SPI interface
Capacity: 64K bytes
Operating voltage: 2.7~3.6V
Size: 14mm × 15mm
Arduino Library for Flash Memory Module W25Q64: Click Here
Communication: SPI Communications
Size: 8M (Byte) (128 blocks (Block), 64K bytes per block, each block of 16 sectors (Sector), 4K bytes per sector, each sector 16 of 256 bytes )
Features: Flash chip within the data only by 1 to 0, from 0 to 1 can not be changed.
CS: CS is a chip select pin, active low. After power until a new instruction is executed, you must make / CS pin to have a falling edge.
DO（MISO）: DO serial data output pin, the output data on the falling CLK (serial clock) pin.
WP：Write-protect pin WP is an effective level is low. Readable and writable high-level, low-level read-only.
DI（MOSI）：The serial data input pin DI, a data, address and command input pins DI from the chip to the inside, to capture data at the rising edge of the capture CLK (serial clock) pin.
CLK（SLCK）：Pin is the serial clock CLK. SPI clock pin, the clock pulse input to output.
HOLD：To maintain HOLD pin, active low. When CS is low, and the HOLD low, the data output pin is high impedance, and will ignore the signal on the data input pin and a clock pin. The HOLD pin is pulled, the device resumes normal operation.
VCC: Power 2.7V ~ 3.6V.
2, W25Q64Flash work
2.1 W25Q64 SPIData transfer timing
W25Q64 supports SPI data transmission timing mode 0 (CPOL = 0, CPHA = 0) and mode 3 (CPOL = 1, CPHA = 1), Mode 0 and Mode 3 The main difference is that when the SPI master hardware interface in the idle state, SCLK of is high level or a low-level state. For Mode 0 is, SCLK is at a low level; for Mode 3 is, SCLK is high. However, in both modes, the input chips are collected at the rising edge of SCLK, the falling edge of the output data.
2.2 W25Q64Data Format
W25Q64 length data format is a data size of 8, starting high, low recurrence.
2.3 W25Q64transfer speed
W25Q64 supported in standard mode 80M bit / s rate, support 160M bit / s speed fast mode, supports 320M bit / s high-speed mode speed.